stm32mp1: add timeout detection in reset driver
authorYann Gautier <[email protected]>
Thu, 14 Feb 2019 08:17:55 +0000 (09:17 +0100)
committerYann Gautier <[email protected]>
Thu, 14 Feb 2019 10:20:23 +0000 (11:20 +0100)
This change makes the platform to panic in case of peripheral reset
resource malfunction.

Change-Id: I17eb9cb045b78a4e5142a8c33b744e84992d732a
Signed-off-by: Yann Gautier <[email protected]>
Signed-off-by: Etienne Carriere <[email protected]>
Signed-off-by: Nicolas LE BAYON <[email protected]>
drivers/st/reset/stm32mp1_reset.c
include/drivers/st/stm32mp1_rcc.h

index b2de76085d02850598ebbbf19b47a8d543231c4b..fd3f93e017c17d307bdf875f4284b8737032dcac 100644 (file)
 
 #include <common/bl_common.h>
 #include <common/debug.h>
+#include <drivers/delay_timer.h>
 #include <drivers/st/stm32mp_reset.h>
 #include <lib/mmio.h>
 #include <lib/utils_def.h>
 
-#define RST_CLR_OFFSET 4U
+#define RESET_TIMEOUT_US_1MS   U(1000)
+
+static uint32_t id2reg_offset(unsigned int reset_id)
+{
+       return ((reset_id & GENMASK(31, 5)) >> 5) * sizeof(uint32_t);
+}
+
+static uint8_t id2reg_bit_pos(unsigned int reset_id)
+{
+       return (uint8_t)(reset_id & GENMASK(4, 0));
+}
 
 void stm32mp_reset_assert(uint32_t id)
 {
-       uint32_t offset = (id / (uint32_t)__LONG_BIT) * sizeof(uintptr_t);
-       uint32_t bit = id % (uint32_t)__LONG_BIT;
+       uint32_t offset = id2reg_offset(id);
+       uint32_t bitmsk = BIT(id2reg_bit_pos(id));
+       uint64_t timeout_ref;
        uintptr_t rcc_base = stm32mp_rcc_base();
 
-       mmio_write_32(rcc_base + offset, BIT(bit));
-       while ((mmio_read_32(rcc_base + offset) & BIT(bit)) == 0U) {
-               ;
+       mmio_write_32(rcc_base + offset, bitmsk);
+
+       timeout_ref = timeout_init_us(RESET_TIMEOUT_US_1MS);
+       while ((mmio_read_32(rcc_base + offset) & bitmsk) == 0U) {
+               if (timeout_elapsed(timeout_ref)) {
+                       panic();
+               }
        }
 }
 
 void stm32mp_reset_deassert(uint32_t id)
 {
-       uint32_t offset = ((id / (uint32_t)__LONG_BIT) * sizeof(uintptr_t)) +
-                         RST_CLR_OFFSET;
-       uint32_t bit = id % (uint32_t)__LONG_BIT;
+       uint32_t offset = id2reg_offset(id) + RCC_RSTCLRR_OFFSET;
+       uint32_t bitmsk = BIT(id2reg_bit_pos(id));
+       uint64_t timeout_ref;
        uintptr_t rcc_base = stm32mp_rcc_base();
 
-       mmio_write_32(rcc_base + offset, BIT(bit));
-       while ((mmio_read_32(rcc_base + offset) & BIT(bit)) != 0U) {
-               ;
+       mmio_write_32(rcc_base + offset, bitmsk);
+
+       timeout_ref = timeout_init_us(RESET_TIMEOUT_US_1MS);
+       while ((mmio_read_32(rcc_base + offset) & bitmsk) != 0U) {
+               if (timeout_elapsed(timeout_ref)) {
+                       panic();
+               }
        }
 }
index 2f29e84d595e4c19c1bcd26d377f9a4c0fc130a5..1922c48154666b68e65b0c3d8fbaafc99a470a89 100644 (file)
 /* Offset between RCC_MP_xxxENSETR and RCC_MP_xxxENCLRR registers */
 #define RCC_MP_ENCLRR_OFFSET           U(4)
 
+/* Offset between RCC_xxxRSTSETR and RCC_xxxRSTCLRR registers */
+#define RCC_RSTCLRR_OFFSET             U(4)
+
 /* Fields of RCC_BDCR register */
 #define RCC_BDCR_LSEON                 BIT(0)
 #define RCC_BDCR_LSEBYP                        BIT(1)